I’m pleased to share a new preprint on TechRxiv introducing a hardware security primitive I’ve been developing: Atomic Memory™, also referred to as ROOM (Read-Once Memory).
The core concept is a measurement–collapse behavior:
The first authorized read returns the stored value and immediately triggers a deterministic collapse event, eliminating the possibility of subsequent reads.
This provides a simple but powerful semantic:
ephemeral secrets can only exist for one controlled, intentional use event.
Why this matters
Modern systems suffer from a broad set of early-read and multi-use leakage surfaces:
- DMA/bus snooping
- speculative execution
- stale cache lines
- cold boot & remanence
- Rowhammer row-conflict reads
- MMIO reordering & multi-core contention
- zeroization race windows
ROOM directly addresses these by eliminating the architectural assumption that memory must be read-many. Instead, the value is consumed in the same event that collapses it.
What’s available today
The repository includes:
- an FPGA demonstration (1024-cell ROOM array on Intel Cyclone V)
- same-cycle read-and-collapse semantics implemented in RTL
- instrumented SignalTap captures
- TCL scripts for automated evaluation
- non-commercial evaluation license
The FPGA version establishes functional semantics — the intended ASIC version moves the collapse into a local combinational transition tied directly to the read gate, eliminating global-clock dependency.
Use Cases
- PQC decapsulation keys
- TLS 1.3 ephemeral secrets
- secure boot chains
- attestation tokens
- one-shot provisioning events
- malware-resistant ephemeral enclave design
Links
- TechRxiv Preprint: https://doi.org/10.36227/techrxiv.176463742.23048082/v1
- GitHub (Reference Implementation): https://github.com/fcunnane/AtomicMemory
Feedback from the hardware security, applied cryptography, and semiconductors community is very welcome.
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